In accordance with CDMA2000 EVDO RevA/RevB standards, the forward link (FL) MAC (Medium Access Control) channel carries an ACK/NAK (ACKnowledgment/Negative AcKnowledgment) sub-channel, a Reverse Link (RL) Power Control Bit (PCB) sub-channel, and a Data Rate Control (DRC) Lock (DRCLock) sub-channel. The Access Network (AN) communicates with a plurality of Access Terminals (ATs) using different Walsh codes. In communicating with each AT, the ACK/NAK bits transmitted by the AN are used to support the H-ARQ (Hybrid Automatic. Repeat Request) of RL traffic transmissions; the RL PCBs are used for RL power control; and the DRCLock bits are used to indicate the quality of the RL DRC channel (i.e, good quality [in-lock], or bad quality [out-of-lock]). The DRC channel on the RL itself carries a request for the AN to send data traffic to the AT on the FL at a certain data rate.
Simulations and tests have shown that when the FL MAC channel is overloaded with simultaneous transmissions to multiple users, a high error rate of ACK/NAKs and PCBs results, thereby causing a delay increase and overall throughput reduction on the RL. Thus, while new technologies such as Interference Cancellation (IC) that can now be employed on the RL have the potential for significantly increasing the RL capacity, the limitations of the FL MAC capacity create a bottleneck, thereby acting as a limiting factor on any such ability to increase the RL traffic capacity.
Co-pending U.S. patent application Ser. No. 11/331,994, filed Jan. 13, 2006, discloses the use of ACK/NAK bits when data traffic is present, and DRC data quality indication bits when traffic is not present, for purposes of conducting closed-loop power control. The DRC data quality indication bits indicate the quality of the DRC data received on the RL DRC channel from an AT. As a result, the number of PCBs transmitted over the FL MAC channel can be reduced and the loading of the FL MAC channel relieved. The transmission of the DRCLock bits, however, continues to appear through simulations to be a big contributor of FL MAC channel loading and thus a limiting factor on RL traffic capacity.